Jianwang Zhai, Ph.D. School of Integrated Circuits Beijing University of Posts and Telecommunications Office: Room 111, Scientific-Research Building Email: zhaijw@bupt.edu.cn

BIOGRAPHY

I am Jianwang Zhai (翟建旺 in Chinese), currently an assistant professor at Beijing University of Posts and Telecommunications (BUPT). Prior to that, I got my Ph.D. in Computer Science and Technology from Tsinghua University (THU) in 2023, and received my B.Eng. from Beijing Jiaotong University (BJTU) in 2018.

My research interests include machine learning and optimization methods with applications in EDA, especially power modeling, design space exploration, and physical design.

RESEARCH INTERESTS

• EDA / VLSI

• Power Modeling

• Design Space Exploration

• Physical Design

EDUCATION

• Ph.D. Computer Science and Technology, Tsinghua University, Sep. 2018 - Jun. 2023

• B.E. Communication Engineering, Beijing Jiaotong University, Sep. 2014 - Jun. 2018

PUBLICATIONS

Conference papers

• [C3] Jianwang Zhai, Yici Cai, Bei Yu, “Microarchitecture Power Modeling via Artificial Neural Network and Transfer Learning”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASP-DAC), Tokyo Odaiba Miraikan, Jan. 16-19, 2023. (Best Paper Award Nomination)

• [C2] Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu, “McPAT-Calib: A Microarchitecture Power Modeling Framework for Modern CPUs”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 01–04, 2021.

• [C1] Chen Bai, Qi Sun, Jianwang Zhai, Yuzhe Ma, Bei Yu, MD Wong, “BOOM-Explorer: RISC-V BOOM Microarchitecture Design Space Exploration Framework”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Nov. 01–04, 2021. (William J. McCalla Best Paper Award)

Journal papers

• [J2] Jianwang Zhai, Chen Bai, Binwu Zhu, Yici Cai, Qiang Zhou, Bei Yu, “McPAT-Calib: A RISC-V BOOM Microarchitecture Power Modeling Framework”, accepted by IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD).

• [J1] Jianwang Zhai, Yici Cai, Qiang Zhou, “Placement and Routing Methods Considering Shape Constraints of JTL for RSFQ Circuits”, IEEE Transactions on Circuits and Systems II: Express Briefs (TCAS-II), vol. 68, no. 5, pp. 1571-1575, 2021.

SELECTED AWARDS

• Best Paper Award Nomination, ASP-DAC, 2023

• William J. McCalla Best Paper Award, ICCAD, 2021

• Huawei Scholarship, Tsinghua University, 2022.

• Longfor Scholarship, Tsinghua University, 2022.

• Comprehensive Excellent Scholarship, Tsinghua University, 2020 & 2021.

• Outstanding Graduate, The Education Committee of Beijing, 2018.

• May 4th Medal, Beijing Jiaotong University, 2018.

• Excellent Student, The Education Committee of Beijing, 2017.

• Baosteel Scholarship, Baosteel Education Foundation, 2017.

• National Scholarship, Ministry of Education of China, 2016.

• National Encouragement Scholarship, Ministry of Education of China, 2015.